Speed Modeling at a Major Semiconductor Manufacturing Facility

Speed Modeling at a Major Semiconductor Manufacturing Facility

The Challenge

A major foundry’s current capacity model contained outdated and unreliable information with regards to wafer processing time per recipe per tool. In an effort to gain a better understanding of their fab’s true capacity they partnered with Tefen to create speed models for tools in all areas of production (except photo).

Approach & Methodology

  • Tefen created speed models for 109 tools across 40 platforms
  • These models were created by utilizing detailed time study analysis of each tool’s operation and interviews with the process and equipment engineers
  • Each speed model’s calculated Units Per Hour (UPH) was verified against the tool’s actual production rate

Results

  • The highly detailed speed models created by Tefen were utilized in the fab’s capacity model
  • During the exercise Tefen also identified multiple additional opportunities for improvement in batching, tool hardware, and process inefficiencies.
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